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filler@godaddy.com
Faster development
Quality of code
No need to understand digital electronics. You will program using high-level concepts as in C++, like variables, arrays, interfaces, ports, signals, components and events. Our FPGA design software makes FPGAs accessible to everyone.
You don't even need a board to learn FPGA programming. The psC code is simulated exactly as it will execute on the real board. In addition, with a BSP - Board Support Package, even board features like LEDs, Switches, Pushbuttons, 7-segments display, VGA display and audio are simulated.
All development is done with the high-level psC language and the simulation tools. In addition, with our BSPs (board support packages), the VHDL synthesis tools are automatically executed and the programming file is loaded onto the FPGA. You don't need to learn the Intel or Xilinx toolchain for supported boards.
Only basic programming skills are required. In the software world, assembly language has been superseded by high level languages where registers and addressing modes have been replaced with easy-to-manipulate concepts. With psC all low-level digital circuit elements, like clocks, flip-flops and combinatorial circuits, have been replaced with easy-to-understand high-level software concepts.
FPGA simulation is the bottleneck in the development process.
Our tools include a fast clock-cycle-accurate high-level simulator.
What You Simulate Is What You Get on the real FPGA
This example and the following ones use the Terasic DE1SoC simulator. The buttons 1 and 2 are used to move the paddle. A smaller VGA size is used to allow simulation of thousands of events, required to drive the VGA interface and create a few images per second. Except for the screen size parameters, the psC code for the real FPGA board will compile without change and work in real time on the DE1SoC board.
This example simulates a simple counter. Buttons implement inputs for load, decrement, increment and reset. Switches are used to enter the load value. LEDs display the counter value and 7-segment displays show both the load value (left) and counter value (right). The simulated board and the real FPGA board will behave in exactly the same manner.
Many programs use memory blocks. Our simulator will display the memory block contents during simulation.
All FPGA applications read and write to pins for communication with peripherals, like LEDs, switches or audio chips. Novakod Studio includes a spreadsheet-like tool to edit input signals and a waveform viewer, the popular GTKWave.
Once your design is completed, you can generate hand-coded quality VHDL code.
The psC language is compiled, not synthesized. Each element of the program corresponds to an element in the VHDL code.
By keeping the link between high-level psC and generated VHDL, programmers can optimize high-level code as if it were low-level VHDL.
During synthesis and timing analysis, the FPGA manufacturer tools can detect timing errors. With Novakod Studio you can trace back the errors to high-level psC and solve the problem directly in the psC code.
Because it is compiled, not synthesized, generated code is as good as hand-coded VHDL. For example, a 32-bit psC counter will use 32 LUTs and will behave like the hand-coded version. The psC code is simply much easier to create, simulate, understand and maintain.
With VHDL, only experts can systematically generate quality code. With psC, as with C++, any programmer will efficiently produce quality code, easy to test, document and maintain.
The generated VHDL cores integrate into any FPGA projects using, for example, the IDE tool chain from Intel FPGA or AMD Xilinx.
The built-in features of the psC language :
will enable the emerging of a new software engineering discipline for hardware programming. We call it codeware engineering.